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Merged
merged 249 commits into from
Jun 22, 2021
Merged

Update #6

merged 249 commits into from
Jun 22, 2021

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Summary

This PR fixes/implements the following bugs/features

  • Bug 1
  • Bug 2
  • Feature 1
  • Feature 2
  • Breaking changes

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Fixes #xxx

FRASTM and others added 30 commits January 4, 2021 11:47
When begining the transaction, the active_listener is not yet
assigned, but null. Then it differs from this but should not
act as if it was listening.
This is the case when testing on nucleo_l552ze board.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
* Prevent redefine of HSE_VALUE if already user-overridden

Commercially sold Blackpill F411CE boards feature a 25MHz crystal, but if a board differs, HSE_VALUE can still be overridden while keeping everything else the same. With defensive programming like this, users of a custom (or differing commercially sold) board can easily use this variant with the same chip but just a slightly different crystal.
Define MASTER_ADDRESS in Wire.cpp to avoid potential conflict
with other libraries.
Use 0x01 for master as it is reserved for START
and thus cannot be used by slave devices.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Included in STM32CubeL5 FW v1.3.1

Signed-off-by: Francois Ramu <francois.ramu@st.com>
Included in STM32CubeL5 FW v1.3.1

Signed-off-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
CMSIS Cortex-M33 Device Peripheral Access Layer System Source File
to be used in non-secure application when the system implements
the TrustZone-M security.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Co-authored-by: Frederic.Pillon <frederic.pillon@st.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Co-authored-by: Frederic.Pillon <frederic.pillon@st.com>
Similar to the STM32L4xx serie

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This bit is mandatory to use PG[15:2]. Especially for LPUART1 TxRx pins.
This bit of the PWR CR2 is used to validate the VDDIO2 supply for
electrical and logical isolation purpose.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Support the new stm32L5xx serie
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
This new implementation is mroe generic and support MP1 as well WB.
H7 could be added easily later if dual core support is implemented.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
WB serie will require more semaphore management for
low power and flash.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
On STM32L1xx, an internal pull-up resistor (1.5 kΩ) can be
connected by software on the USB data + (DP) line.
This internal pull-up resistor is enabled if the USB is
not in power-down mode and if the USB_PU bit is set.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
For STM32L1xx, in Cat.3, Cat.4, Cat.5 and Cat.6 devices
there are up to 42 multiplexed channels organized in 2 banks.
Channels ADC_IN0 to ADC_IN31 are available in Bank A and
channels ADC_IN0b to ADC_IN31b are available in Bank B.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
For STM32L1xx, in Cat.3, Cat.4, Cat.5 and Cat.6 devices
there are up to 42 multiplexed channels organized in 2 banks.
Channels ADC_IN0 to ADC_IN31 are available in Bank A and
channels ADC_IN0b to ADC_IN31b are available in Bank B.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Allow user to set servo default angle on attach.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This avoid to miss it in system clock configuration,
as it is not systematically done by cubeMX

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Fixes #1319

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
valeros and others added 29 commits May 24, 2021 15:25
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Synchronize PlatformIO build script
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Template loop.index is 1 base index while Dx is 0.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Line 106 of "variant_BLACK_F407ZX.cpp" is missing a comma, which has been added
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Included in STM32CubeF1 FW v1.8.4

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Included in STM32CubeF1 FW v1.8.4

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Included in STM32CubeF2 FW v1.9.3

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Included in STM32CubeF2 FW v1.9.3

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Included in STM32CubeL1 FW v1.10.3

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Included in STM32CubeL1 FW v1.10.3

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
Update STM32 F1,F2 and L1 HAL and CMSIS drivers
@sabas1080 sabas1080 merged commit e5ec4aa into ElectronicCats:master Jun 22, 2021
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